For a buffer circuit utilizing bipolar transistor, a leakage current deriving from the transistor base current is generated at the signal input terminal, such that the input impedance of the buffer circuit is lowered. In order to counter this, effect usually a current compensation current is provided to compensate the base current of the transistor.
FIG. 3 shows an example of a buffer circuit having a current compensation circuit. As shown in the figure, in addition to a transistor Q11 that constitutes an emitter follower, this buffer circuit is provided with a current compensation generation circuit comprising transistor Q12 and transistors Q13 and Q14. Transistors Q11 and Q12 are npn transistors, and transistors Q13 and Q14 are pnp transistors.
The base of transistor Q11 is connected to the input terminal of the buffer circuit. The emitter of transistor Q11 is connected to current source IS10, and is connected to the output terminal of the buffer circuit. The emitter of transistor Q12 is connected to the collector of transistor Q11, and the collector is connected to power source voltage V.sub.CC. Transistors Q13 and Q14 constitute a current mirror circuit. The bases of transistors Q13 and Q14 are connected to each other, and that connection is connected to the collector of transistor Q14 as well as to the base of transistor Q12. The emitters of transistors Q13 and Q14 are connected to power source voltage V.sub.CC, and the collector of transistor Q13 is connected to the base of transistor Q11, in other words, to the signal input terminal.
When an input signal V.sub.IN is input to the input terminal of the buffer circuit, a signal V.sub.OUT is output from the emitter of transistor Q11, in other words, from the output terminal of the buffer circuit, in response to the input signal V.sub.IN. When the current value of current source IS10 is made equal to I.sub.1, the emitter current of transistor Q11 becomes I.sub.1. Furthermore, when the base current of transistor Q11 is made equal to I.sub.B1, the emitter current I.sub.2 of transistor Q12--in other words, of the collector of transistor Q11--is found using the following formula:
Formula 1 EQU I.sub.2 =I.sub.1 -I.sub.B1 (1)
Since the base current I.sub.B1 is extremely small, virtually the same current flows in the emitter of transistor Q12 as in the emitter of transistor Q11. By means of the current mirror circuit formed by transistors Q13 and Q14, a current I.sub.3 that is virtually the same as the base current I.sub.B2 of transistor Q12 is output to the collector of transistor Q13. The current I.sub.3 is input to the base of transistor Q11 as a compensation current. Consequently, The current I.sub.IN flowing into the input terminal becomes the difference current between the base current I.sub.B1 of transistor Q11 and the current I.sub.3 generated by the current mirror. It is calculated using the following formula:
Formula 2 EQU I.sub.IN =I.sub.B1 =I.sub.3 (2)
As can be seen from Formula 2, the base current of transistor Q11 is partially offset by means of the compensation current generated by the current compensation circuit, such that the input current of the input terminal is decreased and a high input impedance is attained for the buffer circuit.
However, with the aforementioned conventional buffer circuit, when the current amplification ratio of the pnp transistors Q13 and Q14 which form the current compensation circuit is small, the compensation current I.sub.3 that is generated cannot completely compensate the base current I.sub.B1 of transistor Q11. Furthermore, there is a disadvantage in that the input dynamic range of the buffer circuit is reduced by the voltage V.sub.BEP between the bases-emitters of the pnp transistors Q13 and Q14.
For example, when the current amplification ratio of the npn transistors Q11 and Q12 is made .beta..sub.N and the current amplification ratio of the pnp transistors Q13 and Q14 is made .beta..sub.P, the base current I.sub.B1 of transistor Q11 becomes I.sub.1 /(1=.beta..sub.N) and the emitter current I.sub.2 of transistor Q12 becomes .beta..sub.N I.sub.1 /(1+.beta..sub.N), the same as that of the collector current of transistor Q11. Therefore, the base current I.sub.B2 of transistor Q12 is found with the following formula.
Formula 3 EQU I.sub.B2 =I.sub.2 /(I+.beta..sub.N)=.beta..sub.N I.sub.1 /(1+.beta..sub.N).sup.2 (3)
Furthermore, for the aforementioned current mirror circuit, the following relationship is established for the collector current I.sub.3 of transistor Q13 and the base current I.sub.B2 of transistor Q12.
Formula 4 EQU I.sub.B2 =I.sub.3 +2I.sub.3 /.beta..sub.P =(2+.beta..sub.P)I.sub.3 /.beta..sub.P
From Formulas 3 and 4, the following formula can be found.
Formula 5 EQU I.sub.3 =.beta..sub.N.beta..sub.P I.sub.1 /(1+.beta..sub.N).sup.2 (2+.beta..sub.P) (5)
Consequently, the input current I.sub.IN of Formula 2 is found in the following manner.
Formula 6 EQU I.sub.IN =I.sub.B1 -I.sub.3 =I.sub.1 /(1+.beta..sub.N)-.beta..sub.N.beta..sub.P I.sub.1 /(1+.beta..sub.N).sup.2 (2+.beta..sub.P)=[2(1+.beta..sub.N)+.beta..sub.P ]I.sub.1 /(1+.beta..sub.N).sup.2 (2+.beta..sub.P) (6)
.beta..sub.N satisfies [the inequality] (.beta..sub.N &gt;&gt;1); in addition, when .beta..sub.P is extremely small compared to .beta..sub.N, from Formula 6 the input current I.sub.IN is found with the following approximation method.
Formula 7 EQU I.sub.IN =2/.beta..sub.N (2+.beta..sub.P (7)
From Formulas 6 and 7, when the current amplification ratio .beta..sub.P of pnp transistors Q13 and Q14 which form the current compensation circuit is small, the base current of transistor Q11 cannot be compensated sufficiently by means of compensation current I.sub.3, such that the input current I.sub.IN cannot be reduced sufficiently and the input impedance of the buffer circuit is reduced.
The present invention was devised due to said circumstances, and its purpose is to offer a buffer circuit that is able to achieve a lowering of the input leakage current and to achieve a high input impedance by compensating the base current of the transistor by means of a current compensation circuit; and that is able to avoid a lowering of the input dynamic range by means of the current compensation circuit.